IBIS Macromodel Task Group Meeting date: 15 Apr 2008 Members (asterisk for those attending): Ambrish Varma, Cadence Design Systems * Anders Ekholm, Ericsson * Arpad Muranyi, Mentor Graphics Corp. Barry Katz, SiSoft * Bob Ross, Teraspeed Consulting Group Brad Griffin, Cadence Design Systems David Banas, Xilinx Donald Telian, consultant * Doug White, Cisco Systems Essaid Bensoudane, ST Microelectronics Ganesh Narayanaswamy, ST Micro G*** Guan, Sigrity Hemant Shah, Cadence Design Systems Ian Dodd Joe Abler, IBM * John Angulo, Mentor Graphics John Shields, Mentor Graphics Ken Willis, Cadence Design Systems Kumar, Cadence Design Systems Lance Wang, Cadence Design Systems Luis Boluna, Cisco * Michael Mirmak, Intel Corp. * Mike LaBonte, Cisco Systems Mike Steinberger, SiSoft Mustansir Fanaswalla, Xilinx Patrick O'Halloran, Tiburon Design Automation Paul Fernando, NCSU * Radek Biernacki, Agilent (EESof) * Randy Wolff, Micron Technology Ray Comeau, Cadence Design Systems Richard Mellitz, Intel Richard Ward, Texas Instruments Sam Chitwood, Sigrity Sanjeev Gupta, Agilent Shangli Wu, Cadence * Sid Singh, Extreme Networks Stephen Scearce, Cisco Systems Steve Pytel, Ansoft Syed Huq, Cisco Systems Syed Sadeghi, ST Micro * Terry Jernberg, Cadence Design Systems Todd Westerhoff, SiSoft Vikas Gupta, Xilinx Vuk Borich, Agilent * Walter Katz, SiSoft -------------------------- Call for patent disclosure: - No one declared a patent. ----- Opens: - Arpad will be travelling, unable to host next week. - John Angulo will host. ------------- Review of ARs: - Walter update BIRD 107 based on feedback, coordinate with EDA vendors - Done - David Banas report Xilinx position on LTI assumption for SerDes - No update - Arpad: Write parameter passing syntax proposal (BIRD draft) for *-AMS models in IBIS that is consistent with the parameter passing syntax of the AMI models - TBD - TBD: Propose a parameter passing syntax for the SPICE - [External ...] also? - TBD - Arpad: Review the documentation (annotation) in the macro libraries. - Deferred until a demand arises or we have nothing else to do ------------- New Discussion: Arpad showed Walter's BIRD 107 update document - Blue markup shows the items added. - Terminology cleaned up in places to not be unnecessarily specific: - Kumar recommended these changes. - Step 4 on pg 17 uses less specific terminology - Do not specify "filter" for example. - 2.1.6 uses the word "filtered", but that is OK here. - Radek: Not sure if "for example by convolution" is needed on pg 17. - Arpad: Without the example "combines" may not be clear - Walter: The word "combine" is generic enough. - Walter: Do we vote on this? - Arpad: A consensus will suffice. - Walter: It needs to be written in plain text like BIRD 107.1 - Bob: This document is useful, and should be on the ATM site. - Bob: keep text to 78 character or less line lengths - Walter will send .doc, .pdf, and .txt today - This will be introduced in next IBIS Open Forum meeting. AR: Walter send "final" BIRD 107 documents Arpad showed Walter's Electronic Model Description presentation - Is the list of circuit elements on page 17 complete? - Add K element - Add controlled sources - Can we call the Berkeley SPICE with additions? - Michael M: this a non-transistor level language - Bob: are elements like resistors single or matrix? - Walter: single - Arpad: capacitors and resistors can be made with transistors, but we will not go there - Walter: tools will parse this and convert to proprietary format - Michael M: this conveys only values, not engine-specific information - There is no time step control, for example - Michael M: We should declare which domains are supported: time, freq - Mike L: this is similar to the IBIS macro language we proposed - Arpad: One difference between this and the macro language is S parameter - Walter: this will not run directly in any tool - Arpad: how do we coordinate tool interpretations of the language - Walter: show example inputs and corresponding outputs - S parameter usage is subject to interpretation - Arpad: VHDL-AMS is well defined - If this is loosely defined there will be problems - Walter: how to proceed? - We all agree that some kind of netlist is needed - Tasks: - 1) define IBIS-SPICE meta language elements - 2) define how to represent netlist for module - 3) given a circuit, how to define the associated model - 4) coupled models (this is hard) - Arpad: We may be diving into details too soon - In the past IBIS called the package by reference - This is turned around - The EMD system is top level, it calls the other objects - We can discuss system structure next week - Bob: These could be nested - Walter: If 2 EMDs are connected, which is at top level? - Anders: will EMD enable package modeling? - Walter: Yes - The presentation is on the ibis-atm web site Next meeting: 22 April 2007 12:00pm PT -----------